Technology Inflection Points in Logic Semiconductor Technology : What is Next?
Fellow, Dong-Won Kim
Samsung Electronics Co., Ltd., Korea
Opportunities and Challenges of Emerging Memory In The Era of All About Data
Head of RTC, Myung-Hee Na
SK Hynix, Korea
Controlling Atomic Layer Deposition for Advanced Semiconductor Manufacturing
Prof. Stacey F. Bent
Stanford Univ., USA
Scaling Down and Stacking Up: How the Trends in Semiconductors are affecting Chemical-Mechanical Planarization (CMP)
Dr. Wei-Tsu Tseng
IBM Research, USA
Dry Etch Technologies for Next Generation Small Pitch Patterning at EUV Lithography Era
Dr. Jong Chul Park
0.33 NA EUV Systems for High-Volume Manufacturing
VP. Roderik van Es
ASML, Netherlands
Chips, Dies, Chiplets and Dielets and Heterogeneous Integration (of course!)
Prof. Subramanian S. Iyer
UCLA, USA
Metrology and Inspection Challenges with EUV Patterning at Advanced Nodes
Dr. Sandip Halder
IMEC, Belgium
